GW Instek GDS-2000A series Option User Manual - Manual (Page 53)

LOGIC ANALYZER
53
Serial Bus
The Serial Bus for Logic Analyzer software includes support for 3
common serial interfaces, SPI, UART and I
2 C. Each interface is fully
configurable to accommodate variations in the basic protocols.
Each input can be displayed as binary or hexadecimal. An event
table can also be created to aid in debugging.
Serial Bus Overview
UART Universal Asynchronous Receiver Transmitter.
The UART bus is able to accommodate a wide
range of various common UART serial
communications.
The UART serial bus software is suitable for a
number of RS-232 protocol variants.
Inputs Tx, Rx
Threshold Tx, Rx
Configuration Baud rate, Parity, Packets, End of
packets, Input polarity
Trigger On Tx Start Bit, Rx Start Bit, Tx End of
Packet, Rx End of Packet, Tx Data,
Rx Data, Tx Parity Error, Rx Parity
Error
I 2 C Inter Integrated Circuit is a two line serial data
interface with a serial data line (SDA) and serial
clock line (SCLK). The R/W bit can be configured.
Inputs SCLK, SDA
Threshold SCLK, SDA
Configuration Addressing mode, Read/Write in
address
Trigger On Start, Repeat Start, Stop, Missing
Ack, Address, Data, Address/Data