IEI Integration PICOe-GM45A - Manual (Page 39)

PICOe-GM45A Half-Size CPU Card
Page 39
Figure 2-10: SATA II Connectors
2.5.8 Intel
®
ICH9M Serial Peripheral Interface (SPI) BIOS
The SPI is connected to an SPI BIOS chip. A licensed copy of AMI BIOS is preinstalled on
the SPI BIOS chip. A master-slave protocol is used for communication on the SPI bus.
The slave is connected to the Intel® ICH9M and is implemented as a tri-state bus.
2.5.9 Intel
®
ICH9M USB Controller
Up to seven high-speed, full-speed or low-speed USB devices are supported by the
ICH9M on the PICOe-GM45A. High-speed USB 2.0, with data transfers of up to 480MB/s,
is enabled with the ICH9M integrated Enhanced Host Controller Interface (EHCI)
compliant host controller. USB full-speed and low-speed signaling is supported by the
ICH9M integrated Universal Host Controller Interface (UHCI) controllers.
The seven USB ports implemented on the PICOe-GM45A are connected to three internal
connectors and one external connector. See
721H
Figure 2-11.