Texas Instruments TSB12LV26 - Manual (Page 84)

6–2
Table 6–2. Serial ROM Map
BYTE
ADDRESS
BYTE DESCRIPTION
00 PCI maximum latency (0h) PCI_minimum grant (0h)
01 PCI vendor ID
02 PCI vendor ID (msbyte)
03 PCI subsystem ID (lsbyte)
04 PCI subsystem ID
05 [7]
Link_enhancement-
Control.enab_unfair
[6]
HCControl.
ProgramPhy
Enable
[5]
RSVD
[4]
RSVD
[3]
RSVD
[2]
Link_enhancement-
Control.enab_
insert_idle
[1]
Link_enhancement-
Control.enab_accel
[0]
RSVD
06 Mini ROM address
07 GUID high (lsbyte 0)
08 GUID high (byte 1)
09 GUID high (byte 2)
0A GUID high (msbyte 3)
0B GUID low (lsbyte 0)
0C GUID low (byte 1)
0D GUID low (byte 2)
0E GUID low (msbyte 3)
0F Checksum
10 [15]
RSVD
[14]
RSVD
[13–12]
AT threshold
[11]
RSVD
[10]
RSVD
[9]
RSVD
[8]
RSVD
11 [7]
RSVD
[6]
RSVD
[5]
RSVD
[4]
Disable
Target
Abort
[3]
GP2IIC
[2]
Disable SCLK gate
[1]
Disable PCI gate
[0]
Keep PCI
12 [15]
PME D3 Cold
[14]
RSVD
[13]
PME
Support
D2
[12]
RSVD
[11]
RSVD
[10]
D2 support
[9]
RSVD
[8]
RSVD
13 [7]
RSVD
[6]
RSVD
[5]
RSVD
[4]
RSVD
[3]
RSVD
[2]
RSVD
[1]
RSVD
[0]
Global
swap
14 RSVD
15–1E RSVD
1F RSVD