Texas Instruments TSB12LV26 - Manual (Page 74)

4–36
4.38 Asynchronous Context Command Pointer Register
The asynchronous context command pointer register contains a pointer to the address of the first descriptor block
that the TSB12LV26 accesses when software enables the context by setting the asynchronous context control
register (see Section 4.37) bit 15 (run). See Table 4–28 for a complete description of the register contents.
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Name Asynchronous context command pointer
Type RWU RWU RWU RWU RWU RWU RWU RWU RWU RWU RWU RWU RWU RWU RWU RWU
Default X X X X X X X X X X X X X X X X
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Name Asynchronous context command pointer
Type RWU RWU RWU RWU RWU RWU RWU RWU RWU RWU RWU RWU RWU RWU RWU RWU
Default X X X X X X X X X X X X X X X X
Register: Asynchronous context command pointer
Type: Read/Write/Update
Offset: 18Ch [ATRQ]
1ACh [ATRS]
1CCh [ArRQ]
1ECh [ArRS]
Default: XXXX XXXXh
Table 4–28. Asynchronous Context Command Pointer Register Description
BIT FIELD NAME TYPE DESCRIPTION
31–4 descriptorAddress RWU Contains the upper 28 bits of the address of a 16-byte-aligned descriptor block.
3–0 Z RWU
Indicates the number of contiguous descriptors at the address pointed to by the descriptor address. If
Z is 0, then it indicates that the descriptorAddress field (bits 31–4) is not valid.