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Texas Instruments MSP50C614 User Manual

Page 140

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Bit, Byte, Word and String Addressing

4-48

Example 4.5.7

MOV STR, 4–2

MOV AP0, 2

MOV R0, 0x0001 * 2

MOVBS A0, *R0++

Refer to Figure 4–4 for this example. The word-string length is 4. AP0 points
to AC2 accumulator. R0 is loaded with 0x0002. The fourth instruction loads the
value of the word-string at the RAM address in R0, 0x0002. R0 autoincrements
by 2 after each fetch and stores them into four consecutive accumulators
starting from AC2. The result is, AC2 = 0x5678, AC3 = 0x9ABC, AC4 =
0xDEF0, AC5 = 0x1122. There were 4 word fetches and the new value of R0
= 0x000A.

Example 4.5.8

SFLAG *0x0003

MOV A0, *0x0003 * 2

RFLAG *0x0003

MOV A0, *0x0003 * 2

Refer to Figure 4–4 for this example. This example illustrates the use of the
TAG and flag bits. Notice that SFLAG uses a word address, 0x0003, while the
MOV instruction uses a byte address 0x0003 * 2. The first instruction sets the
flag/tag bit at flag address 0x0003. Flag address 0x0003 represents the 17

th

bit of the 3

rd

word (or 6

th

byte) of RAM. In the second instruction, this flag bit

is placed in the TAG status bit of the STAT and the value in RAM location
0x0003 * 2 is placed in A0. The third instruction resets the flag/tag to 0 at the
same flag address. The fourth instruction reads the same word memory loca-
tion and writes the TAG bit of STAT, which is now 0. Note: SFLAG *0x0003
could have been replaced by STAG *0x0003 * 2 and RFLAG *0x0003 could
have been replaced by RTAG *0x0003 * 2.

Example 4.5.9

SFLAG *0x0005

MOVB A0, *0x000b

RFLAG *0x0005

MOVB A0, *0x000b

Refer to Figure 4–4 for this example. The SFLAG instruction sets the 17

th

bit

(tag/flag) of the 5

th

word of RAM. The MOVB instruction gets the lower byte

of the 5

th

word of RAM and puts it in A0. In addition, the TAG bit of the STAT

register is set. If the MOVB instruction addressed *0x000A instead of *0x000B,
the STAT register would still be updated with the same tag/flag bit (the 17

th

bit

of the 5

th

word of RAM). This means that odd byte locations in RAM, RAM

odd

,

have the same tag/flag as the preceding byte location RAM

odd

–1. For exam-

ple, the 7

th

word of RAM is made up of two bytes: 0x000E, and 0x000F. These

two byte locations share the same tag/flag bit.