HP A9834-9001B - Manual (Page 27)

Chapter 1
Overview
Power System
27
- Inline connector: Mennekes ME532C6-16, 3-phase, 5-wire, 32 Amps, 450/475 V, VDE certified, color
red,IEC309-1, IEC309-2, grounded at 6:00 o'clock.
- Panel-mount receptacle: Mennekes ME532R6-1276, 3-phase, 5-wire, 32 Amp, 450/475 V, VDE certified, color
red, IEC309-1, IEC309-2, grounded at 6:00 o'clock.
- FUSE per phase: 25 Amp (valid for Germany).
DC Power
Each power supply output provides 48 V dc up to 60 A (2.88kVA) and 5.3 V dc housekeeping. Normally an
SD32 Superdome cabinet contains six BPS independent from the installed amount of cells and I/O. An SD16
normally has four BPS installed.
System Power On Sequence
The general power up sequence order is as follows:
1. AC power cord is pulled in and front end power supply (FEPS) breakers closed.
2. Housekeeping (HKP) power is applied. Utilities initialization and the complex configuration is checked.
3. Power switch on and the cabinet 48V power is enabled.
4. SPU cabinet main backplane powered on and reset. The main system backplane comes up first and
supplies clocks to cells and I/O backplanes. Backplane XBCs must be ready by the time cell controllers
initialize.
5. I/O backplanes are powered on.
6. Cell boards are powered on.
7. SUB queries cells for valid complex profiles. Cells must be powered up with 48 V in addition to HKP. When
one valid cell is located, a timer starts and cell boards not ready, after the timer counts down, will not be
initialized.
8. Early CPU_INIT and cell monarch selections begin.
9. Cell board nitialization begin.
10. Partitions seek rendezvous and perform core-cell selections.
11. Partition domains are Iinitialized.
12. IPL is launched.
Enabling 48 Volts
The PM is responsible for enabling 48 V, but it must have permission from the MP. To enable 48 V, the
transition cabinet power switch must be moved from OFF to ON. Or you can use the MP command pe if the
power switch is already on. (If switch is on the cabinet wakes up from power on reset).
If the PM has permission, it sends a PS_CTL_L signal to the FEPS. Then the BPS enables 48 V converters
which send 48 V to the backplane, I/O Chassis, HUCB, cells, fans, and blowers. Once the 48 V is enabled, it is
cabled to the backplane, cells, and I/O chassis(s).