Welltech SPCI2S Intel NetStructure SS7 Boards - Manual (Page 99)

SS7 Programmer’s Manual for SPCI2, SPCI4 and CPM8 Issue 2 Page 99
A2.3 MTP Signalling Link
Syntax: MTP_LINK
Example: MTP_LINK 0 0 2 2 0 1 0 16 0x0006
Configuration of a signalling link.
The link’s unique logical link identity. It must be in the range 0 to one less than the total number of
signalling links supported.
The logical identity of the link set to which the link belongs. The linkset must already have been
configured using the MTP_LINKSET command.
The logical identity within the link set of the signalling link. It should be in the range 0 to one less than
the number of links in the link set.
The signalling link code for the signalling link. This must be unique within the link set and will usually
be the same as the . The valid range is 0…15.
The board id of the signalling processor allocated for this signalling link.
The index of the signalling processor (within the board) allocated for this signalling link. It should be in
the range 0 to one less than the number of signalling processors on the board.
When is set to a non-zero value, the parameter is the logical identity of the E1 /
T1 line interface (liu_id) containing the signalling link It should be in the range 0 to one less than the
number of line interfaces.
The timeslot used for signalling in the range 1 .. 31. For an E1 interface the valid range is 1 .. 31. For
a T1 interface the valid range is 1 .. 24. When set to zero the signalling path through the card must
be set up manually using the switch control messages.
A 16 bit value containing additional run-time options.
Bit 0 is set to 1 to force the use of the emergency proving period during link alignment or 0 to use
the appropriate proving period according to the MTP3 recommendations.