Welltech SPCI2S Intel NetStructure SS7 Boards - Manual (Page 59)

SS7 Programmer’s Manual for SPCI2, SPCI4 and CPM8 Issue 2 Page 59
sc_channel
The channel number of the first channel to be used on the CT bus. This should
be in the range from 0 up to one less than the total number of channels on the
CT bus.
ts_mask
A 32 bit timeslot mask where each bit position is set to 1 if the corresponding
timeslot on the E1/T1 interface is required to be connected to the CT bus. The
least significant bit (bit 0) represents timeslot 0. Each timeslot for which the
corresponding bit is set in ts_mask will be connected up to the CT bus, other
timeslots will not be affected in any way.
Timeslots containing SS7 signalling that will be processed by the signalling
processor on the card should not be included in the timeslot mask. Usually the
mask should be set to include all bearer (voice) timeslots but no signalling
timeslots. Bit 0 (corresponding to timeslot 0 on the LIU) must not be set as
timeslot 0 for an E1 interface contains synchronisation information whilst
timeslot 0 for a T1 interface does not exist.
As an example, for an E1 interface with SS7 signalling on timeslot 16, and the
remaining 30 timeslots used for voice circuits, ts_mask should be set to the
value 0xfffefffe. For a T1 interface with signalling on timeslot 24, ts_mask
should be set to the value 0x00fffffe
mode
This parameter controls how the CT bus channels are allocated. Usually
(mode=1) the first timeslot connected to the CT bus is connected to
sc_channel and each subsequent timeslot that is connected will be connected
to the next CT bus channel. This allows maximum utilisation of channels on the
CT bus.
An alternative mode (mode=2) (that should only be used if there is a specific
requirement for it) associates (but does not necessarily connect) timeslot 0 on
the LIU with sc_channel and subsequent timeslots on the LIU with subsequent
CT bus channels. Connections are only made when the corresponding bit in the
timeslot mask is set to 1. This mode of operation preserves the spacing
between timeslots that was originally found on the E1/T1 interface but does
result in a number of CT bus channels being not used.