Welltech SPCI2S Intel NetStructure SS7 Boards - Manual (Page 100)

SS7 Programmer’s Manual for SPCI2, SPCI4 and CPM8 Issue 2 Page 100
Bit 1 is set to 1 to cause a signalling link test (in accordance with ITU-T Q.707 / ANSI T1.111.7) to
be carried out before a link is put into service, or 0 if a test is not required.
Bit 2 is set to 1 to cause a signalling link test (in accordance with ITU-T Q.707 / ANSI T1.111.7)
to be carried out every 30 seconds. Note that this bit is ignored unless bit 1 is also set to 1.
Bit 8 is used to select the MTP2 error correction mode. It is set to 1 to select PCR (Preventive
Cyclic Retransmission) operation or zero for the Basic Method of Error Correction.
Bit 11 is set to 1 to select 56kbit/s operation for the link or 0 for 64kbit/s operation.
NOTE: When using a serial port, 56kbit/s operation is only supported when the clock is applied
externally.
Bit 13 is only used when the link has been configured to run over a serial port. If set to 1 an
external clock will be used (Receive clock). If set to zero an internal clock (Transmit clock) will be
used. If the link has not been configured to run over a serial port, this bit must be set to 0.
Bit 14 is set to 1 to use a serial port rather than a PCM timeslot for this link. In this mode the
stream and timeslot parameters for this link will be ignored (and should be set to zero). If this bit is
set to zero, the link will use the specified stream and timeslot. The serial port used by the
signalling processors for each link is fixed, according to the following table:
blink Serial Port
0 B
1 A
2 Cannot be used for a serial port
3 Cannot be used for a serial port
Bit 15 is set to 1 to disable the link or 0 to enable the link.
All other bits are reserved for future use and should be set to zero.