AMETEK SLM Series RevC - Manual (Page 21)

Sorensen SLM-Series DC Load Introduction, Features, Specifications
M540071-01 Rev C 1-9
1.4
Regulatory Compliance
• Certified to UL 61010-1, CSA C22.2 No. 61010.1 and IEC/EN 61010-1
• CE Compliant:
o
Low Voltage Directive (73/23/EEC) using EN 61010-1, and
o
EMC Directive (89/336/EEC) using EN 61326
• FCC Compliant to 21 CFR, Subpart J.
1.5
Block Diagram
A functional block diagram of the SLM-series DC electronic load module is illustrated in Figure 1-11.
(Please refer to the SLM Mainframe Operation Manual for the functional block diagram of the
mainframe).
Memory
Front Panel
Display and
Keyboard
OTP Protection
Circuitry
Serial Port
Osciallator Circuit
CPU
Programmable Pulse
Generator
Control Circuit
16-bit A/D
12-bit
D/A
8-bit
D/A
12-bit
D/A
8-bit
D/A
8-bit
D/A
Dynamic Function
Control
LOW
LEVEL
HIGH
LEVEL
RISE
FALL
Load ON
Control
Power MOSFET
Stage
LEVEL
Digital Ammeter
Current
Sense
CC
CR
CV
CP
LOAD
INPUT
Vsense Control
Circuit
Voltage Amp
Digital Voltmeter
Voltage
Amp
Vsense
Input
Imonitor
Output
DVM/DAM
Select
MODE Select
Buffer
Figure 1-11 Block Diagram of SLM-Series DC Electronic Load
The isolated serial port of the SLM mainframe receives the remote programming load level status.
Six parameters (Hi/Low levels, Rise/Fall slew rates, T
HIGH /T LOW durations) constitute the wide range
pulse generator, and can be used to test the power supply - Device Under Test (DUT).
The two 12-bit Digital/Analog (D/A) converters convert the programmed High/Low load level data to an
analog signal, and then feed the signal to the input of static/dynamic function control circuit.
The two 8-bit D/A converters control the load current slew rate for Rise and for Fall slew rates.
The two 16-bit timers set T
HIGH and T LOW durations.