Altera Cyclone V SoC Development Board - Manual (Page 14)

2–6 Chapter 2: Board Components
MAX V CPLD 5M2210 System Controller
Cyclone V SoC Development Board November 2013 Altera Corporation
Reference Manual
MAX V CPLD 5M2210 System Controller
The board utilizes the 5M2210ZF256I5N System Controller, an Altera MAX V CPLD,
for the following purposes:
■ FPGA configuration from flash
■ Power measurement
■ Control and status registers (CSR) for remote system update
Figure 2–2 illustrates the MAX V CPLD 5M2210 System Controller's functionality and
external circuit connections as a block diagram.
FPGA clock inputs mixed 5
FPGA LEDs 1.5-V 4
FPGA buttons and switches mixed 7
FPGA DDR3 1.5-V SSTL 71
FPGA Dual Ethernet 2.5-V 14
FPGA SDI control 2.5-V 8
FPGA SDI video 1.5-V PCML 4
FPGA MAX V SPI port 2.5-V 4
FPGA HSMC mixed 107
FPGA PCI Express control mixed 7
FPGA PCI Express transceivers 1.5-V PCML 4
Total I/O Used: 393
Table 2–3. Cyclone V SoC I/O Pin Count
Function I/O Standard I/O Count
Figure 2–2. MAX V CPLD 5M2210 System Controller Block Diagram
Information
Register
Embedded
USB-Blaster II
Oscillator
Controller
SLD-HUB
PFL
SPI Bus
MAX V CPLD System Controller
LTC 2978
Power
Controllers
Virtual-JTAG
PC
FPGA
I 2 C
Controller
Decoder Encoder GPIO
JTAG Control
Control
Register
Si570, Si571,
Si5338
Programmable
Oscillator