Altera FIR Compiler - Manual (Page 70)

A–2 Appendix A: FIR Compiler Supported Device Structures
Supported Device Structures
FIR Compiler User Guide © May 2011 Altera Corporation
Parallel Fixed
Coefficient 2 to 32 for
signed, 1
to 32 for
unsigned Avalon-ST
interface and
optional global
clock enable Logic cell, Auto Logic cell,
M512, M4K,
MLAB, M9K,
Auto Yes Yes
Reloadable
Coefficient 2 to 32 for
signed, 1
to 32 for
unsigned Avalon-ST
interface and
optional global
clock enable Logic cell, Auto M512, M4K,
M512, M4K,
MLAB, M9K,
Auto Yes Yes
Interpolation
(Reloadable
Coefficient must
be in memory) 4 to 32 Avalon-ST
interface and
optional global
clock enable Logic cell, Auto Logic cell,
M512, M4K,
MLAB, M9K,
Auto Yes N/A
Decimation
(Reloadable
Coefficient must
be in memory) 4 to 32 Avalon-ST
interface and
optional global
clock enable Logic cell, Auto Logic cell,
M512, M4K,
MLAB, M9K,
Auto Yes N/A
Multicycle
Variable Clocks to
compute = 1 2 to 32 for
signed, 1
to 32 for
unsigned Avalon-ST
interface and
optional global
clock enable Logic cell, Auto Logic cell, if
(number of
coefficient
set) >1,
M512, M4K,
MLAB, M9K,
Auto Yes Yes
Clocks to
compute = 2 2 to 32 for
signed, 1
to 32 for
unsigned Avalon-ST
interface and
optional global
clock enable Logic cell, Auto Logic cell,
M512, M4K,
MLAB, M9K,
Auto Yes Yes
Clocks to
compute = 3 2 to 32 for
signed, 1
to 32 for
unsigned Avalon-ST
interface and
optional global
clock enable Logic cell, M512,
M4K, MLAB, M9K,
M144K, Auto Logic cell,
M512, M4K,
MLAB, M9K,
Auto Yes Yes
Interpolation:
Clocks per
output = 1 2 to 32 for
signed, 1
to 32 for
unsigned Avalon-ST
interface and
optional global
clock enable Logic cell, M512,
M4K, MLAB, M9K,
M144K, Auto Logic cell,
M512, M4K,
MLAB, M9K,
Auto Yes N/A
Decimation:
Clocks per
input = 1 2 to 32 for
signed, 1
to 32 for
unsigned Avalon-ST
interface and
optional global
clock enable Logic cell, M512,
M4K, MLAB, M9K,
M144K, Auto Logic cell,
M512, M4K,
MLAB, M9K,
Auto Yes Yes
Table A–1. Device Structures Supported by FIR Compiler (Part 2 of 2)
Structure
Sub
Structure
Input Bit
Width
Flow
Control
Data
Storage
Coefficient
Storage
Multiple
Coefficient
Sets
Symmetric
Coefficient