Altera FIR Compiler - Manual (Page 11)

Chapter 1: About the FIR Compiler 1–7
Performance and Resource Utilization
© May 2011 Altera Corporation FIR Compiler User Guide
Table 1–6 shows performance figures for Stratix IV devices:
Parallel (LE), pipeline level 1 (2) , (3)
3,416 3,715 208 3 — 288 288 28
Parallel (M9K), pipeline level 1 (2) , (5)
1,948 2,155 120,030 48 — 283 283 27
Serial (M9K), pipeline level 1 (2) , (3)
327 462 14,167 8 — 323 36 3
Notes to Table 1–5 :
(1) GMAC = giga multiply accumulates per second (1 giga = 1,000 million).
(2) This FIR filter takes advantage of symmetric coefficients.
(3) Using EP3C10F256C6 devices.
(4) Using EP3C16F484C6 devices.
(5) Using EP3C40F780C6 devices.
(6) It may be possible to significantly reduce memory utilization by setting a lower target f
MAX
.
Table 1–5. FIR Compiler Performance—Cyclone III Devices (Part 2 of 2)
Combinational
LUTs
Logic
Registers
Memory (6)
Multipliers
(9x9)
f
max
(MHz)
Throughput
(MSPS)
Processing
Equivalent
(GMACs) (1) Bits M9K
Table 1–6. FIR Compiler Performance—Stratix IV Devices
Combinational
ALUTs
Logic
Registers
Memory
Multipliers
(18x18)
f
max
(MHz)
Throughput
(MSPS)
Processing
Equivalent
(GMACS) (1) Bits (M9K) ALUTs
Multibit Serial, pipeline level 1 (2) , (3) , (4)
766 1,166 55,276 42 16 — 503 101 10
Multicycle variable (1 cycle) decimation by 4, pipeline level 1 (2) , (3)
336 844 1,400 16 28 14 443 443 43
Multicycle variable (1 cycle) interpolation by 4, pipeline level 2 (3)
200 1,274 64 — 8 24 372 372 36
Multicycle variable (1 cycle), pipeline level 2 (2) , (3)
741 1,936 148 1 8 48 443 443 43
Multicycle variable (4 cycle), pipeline level 2 (2) , (3)
717 1,398 796 6 36 14 323 81 8
Parallel (LE), pipeline level 1 (2) , (3)
2,153 2,672 157 1 8 — 421 421 41
Parallel (M9K), pipeline level 1 (3)
821 1,730 119,872 45 8 — 457 457 44
Serial (M9K), pipeline level 1 (2) , (3)
245 415 14,231 11 8 — 523 58 6
Notes to Table 1–6 :
(1) GMAC = giga multiply accumulates per second (1 giga = 1,000 million).
(2) This FIR filter takes advantage of symmetric coefficients.
(3) Using EP4SGX70DF29C2X devices.
(4) The data width is 16-bits and there are 4 serial units.