Echelon FTXL - Manual (Page 16)

4 Introduction to FTXL
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Figure 1. A Single-Chip L ON W ORKS Device
For a Neuron-hosted device that uses a Neuron Chip or Smart Transceiver, the
physical layer (layer 1) is handled by the Neuron Chip or Smart Transceiver.
The middle layers (layers 2 through 6) are handled by the Neuron firmware. The
application layer (layer 7) is handled by your Neuron C application program. You
create the application program using the Neuron C programming language in
either the NodeBuilder
® Development Tool or the Mini EVK Evaluation Kit.
A L
ON
W
ORKS
Device with Two Processor Chips
Some L ON W ORKS devices run applications that require more memory or
processing capabilities than a single Neuron Chip or Smart Transceiver can
provide. Other L
ON W ORKS devices are implemented by adding a transceiver to
an existing processor and application. For these applications, the device uses two
processor chips working together:
• An Echelon Smart Transceiver
• A microprocessor, microcontroller, or embedded processor in a field-
programmable gate array (FPGA) device, typically called the host
processor
A L ON W ORKS device that uses two processor chips is called a host-based device,
which means that the device includes a Smart Transceiver plus a host processor.