Building the application image – Echelon FTXL User Manual

Page 119

FTXL User’s Guide

107

f. In the Properties window, click Apply to save these settings, then

click OK to close the dialog.

Other options and properties can be set to their default values.

Building the Application Image

After you first create your application project in the Nios II IDE, you should

perform a clean build to remove obsolete files and to fix any problems from a
previously built state.
To clean the FTXL software image:

1. Select Project → Clean to open the Clean window.

2. In the Clean window, ensure that the Clean all projects radio button is

selected and that the Start a build immediately checkbox is selected and
click OK.

For subsequent builds, you can perform automatic or manual builds.
To build the FTXL software image automatically:

1. Select Window → Preferences to open the Preferences window.
2. In the Preferences window, expand General and select Workspace to

display the Workspace page.

3. In the Workspace page, select Build automatically. For automatic

builds, you should also select Save automatically before build to ensure

that your most recent changes are included in the build.

4. In the Preferences window, click Apply to save these settings, then click

OK to close the dialog.

To build the FTXL software image manually, select Project → Build Project or

Project → Build All. You can also right-click the project folder from the Nios II

C/C++ Projects pane and select Build Project.

After you build the project, you can run it in RAM, as described in

on page 108, or you can load the software image into persistent

memory, as described in

Loading the Application Image into Persistent
Memory

To load the software image into persistent memory (such as flash memory):

1. Ensure that the FPGA device board is powered on and that a device

programmer (such as a USB-Blaster download cable) is connected to the

board’s JTAG header connector.

2. Start the Nios II IDE.

3. Select the FTXL application project from the Nios II C/C++ Projects pane.
4. Ensure that the FPGA device contains the hardware image in RAM:

a. Select Tools → Quartus II Programmer to open the open the

Chain Description File view for the project.