3 the limit switch interface and i/o status, 1 sd, 2 el – ADLINK PCI-8134A User Manual
Page 65: The limit switch interface and i/o status

Operations
• 55
CAUTION
Due to differences between the motion chipsets on the PCI-8134 and PCI-
8134A, ERC output pulse width with the PCI-8134A may be less than 
originally output by the PCI-8134. 
4.3
The Limit Switch Interface and I/O Status
In this section, the following I/O signals’ operations are described.
• SD: Ramping Down sensor 
• ±EL: End-limit sensor 
• ORG: Origin position 
• SVON and RDY 
I/O status readback
In any operation mode, if an
±EL signal is active during moving condition, it
will cause PCI-8134/PCI-8134A to stop output pulses automatically. If an 
SD signal is active during moving condition, it will cause PCI-8134/PCI-
8134A to decelerate. 
4.3.1
SD
The ramping-down signals are used to slow-down the control output signals 
(OUT and DIR) when it is active. The signals are very useful to protect the 
mechanism moving under high speed toward the mechanism limit. PSD 
indicates ramping-sown signal in plus (+) direction and MSD indicates 
ramping-down signal in minus (-) direction. 
During varied speed operation in the home return mode or continuous 
operation mode, the ramping-down signal in the moving direction lets the 
output control signals (OUT and DIR) ramp down to the pre-setting starting 
velocity. 
The ramping-down function can be enable or disable by software function: 
set_sd_logic(). The input logic polarity, level operation mode, or latched 
input mode can also be set by this function. The signals status can be 
monitored by get_io_status(). 
4.3.2
EL
