ADLINK PCI-8134A - Manual (Page 29)

Signal Connections
• 19
Output
Signal
For differential line driver
output, close a break
between 1 and 2 of
For open collector
output, close a break
between 2 and 3 of:
OUT1- J1 J1
DIR1- J2 J2
OUT2- J3 J3
DIR2- J4 J4
OUT3- J5 J5
DIR3- J6 J6
OUT4- J7 J7
DIR4- J8 J8
The default setting of OUT and DIR signals are the as differential line driver
mode.
The following wiring diagram is for the OUT and DIR signals of the 4 axes.
NOTE: If the pulse output is set to the open collector output mode, the
OUT- and DIR- are used to send out signals. Please take care
that the current sink to OUT- and DIR- pins must not exceed 20mA.
The current may provide by the EX+5V power source, however,
please note that the maximum capacity of EX+5V power is 500mA.
VCC
EX+5V
J1~J8
OUT
DIR
from Motion ASIC
OUT+, DIR+
OUT-, DIR-
EXGND
R
3
1
2
2631
CN2
Inside PCI-8134/PCI-8134A