Digital output (do) sample clock – ADLINK PCIe-7360 User Manual
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Operations
33
PCIe-7360
Digital Output (DO) Sample Clock
For the operation of digital pattern generation in continuous mode
or burst handshake mode, PCIe-7360 card can generate digital
data to external devices at a specific update rate (DO sample
clock). DO sample clock can be selected as the following two
clock sources:
X
Internal DO sample clock – the PCIe-7360 can internally
generate the sample clock signal for digital data generation.
With an internal clock source of 100MHz, the PCIe-7360
can generate any clock frequency of 100 MHz/n, where n is
any integer from 1 to 65535.
X
External DO sample clock – the PCIe-7360 can receive an
external sample clock signal from AFI6 or SMB CLK con-
nector as the DO sample clock for synchronization applica-
tions.
In addition, the PCIe-7360 can also export internal DO sample
clock to external devices through AFI6 pin or SMB CLK connector.
DI/DO sample clock architecture of PCIe-7360 is as follows.