ADLINK PCIe-7360 - Manual (Page 14)

4 Introduction
1.3.3 Application Function I/O (AFI)
1.3.4 Timing Specifications
Channels 8
Direction
(programmable)
Input or output, per channel basis
Logic levels
(programmable)
1.8 V 2.5 V
3.3 V (5 V
compatible)
Input
voltage
Min.
V
IH
1.2 V 1.6 V 2 V
Max.
V
IL
0.63 V 0.7 V 0.8 V
Output
voltage
Min.
V
OH
1.6 V 2.3 V 3.1 V
Max.
V
OL
0.2 V 0.2 V 0.2 V
Driving capacity
(max.)
±8 mA ±16 mA ±32 mA
Input impedance 10 kΩ
Input protection
range
-1 to 6 V
Output impedance 50 Ω
Power-up initial state Tri-state/All digital inputs
Output protection
range
-0.5V to 3.8V
Supported Modes
(programmable)
I
2
C master
SPI master
Handshake
External trigger in/out
DI/DO sample clock in/out
Sample Clock
Clock sources
Internal clock: onboard 100MHz with 16-bit
divider
External clock: AFI6 (for DO)
AFI7 (for DI)
SMB CLK in