ADLINK PCIe-7360 - Manual (Page 42)

32 Operations
clock). DI sample clock can be selected as the following two clock
sources:
X
Internal DI sample clock – the PCIe-7360 can internally
generate the sample clock signal for digital data acquisition.
With an internal base clock source of 100 MHz, the
PCIe-7360 can generate any clock frequency of 100 MHz/n,
where n is any integer from 1 to 65535.
X
External DI sample clock – the PCIe-7360 can receive
external clock signal from AFI7 or SMB CLK as the DI sam-
ple clock for synchronization applications. The external DI
sample clock supports up to 100MHz @ 8/16/24/32-CH
(8/16/24/32-bit data width) or up to 200MHz @ 8/16-CH
(8/16-bit data width).
In addition, the PCIe-7360 can also export internal DI sample
clock to external devices through AFI7 pin or SMB CLK connector.