Kontron NSN2U IP Network Server - Manual (Page 28)

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Channel Independent Mode
In Channel Independent mode, multiple channels can be populated in any order (e.g.,
channels B and C can be populated while channel A is empty). Also, DIMMs on adjacent
channels need not have identical parameters. Therefore, all DIMMs are enabled and used
in the Channel Independent mode.
Adjacent slots on a DDR3 channel for the Intel
® Xeon ® Processor 5500 Series do not need
matching size and organization. However, the speed of the channel is configured to the
maximum common speed of the DIMMs.
Single channel mode is established by using the Channel Independent mode and
populating DIMM slots from channel A only.
Channel Mirroring Mode
The Intel
®
Xeon
®
Processor 5500 Series supports channel mirroring to configure
available channels of DDR3 DIMMS in a mirrored configuration. Unlike channel sparing,
the mirrored configuration is a redundant image of the memory, and can continue to
operate despite the presence of sporadic uncorrectable errors.
Channel mirroring is a RAS feature in which two identical images of memory data are
maintained, thus providing maximum redundancy. On Intel
®
Xeon
®
Processor 5500 Series
based server boards, mirroring is achieved across channels. Active channels hold the
primary image and the other channels hold the secondary image of the system memory.
The integrated memory controller in the Intel ® Xeon ® Processor 5500 Series alternates
between both channels for read transactions. Write transactions are issued to both
channels under normal circumstances.
When the system is in the Channel Mirroring mode, channel C and channel F of socket 1
and socket 2 respectively are not used. Thus, the DIMMs populated on these channels
are disabled and do not contribute to the available physical memory. For example, if
the system is operating in Channel Mirroring mode and the total size of the DDR3 DIMMs
is 1.5 GB (3 x 512 MB DIMMs), then the active memory is only 1 GB.
Because the available system memory is divided into a primary image and a copy of the
image, the system memory is reduced by at least one-half. For example, if the system
is operating in the Channel Mirroring mode and the total capacity of the DDR3 DIMMs is
1 GB, then the effective size of the memory is 512 MB because half of the DDR3 DIMMs
are the secondary images.
For channel mirroring to work, DDR3 DIMMs in the same slots on adjacent channels must
be identical in terms of technology, number of ranks, and size. DIMMs within the
channel do not need matching parameters.
The BIOS setup provides an option to enable mirroring if the current DIMM population
is valid for channel mirroring. When memory mirroring is enabled, the BIOS attempts to
configure the memory system, if the BIOS finds that the DIMM population is not
suitable for mirroring, it falls back to the default Channel Independent mode with
maximum memory interleaving.
Minimum DDR3 DIMM Population for Channel Mirroring
Memory mirroring has the following minimum requirements:
•
Channel configuration: Mirroring requires the first two adjacent channels to be
active.
• Socket configuration: Mirroring requires that both socket 1 and socket 2 DIMM
population meets the requirements for mirroring mode. The platform BIOS configures
the system in mirroring mode only if both nodes qualify. The only exception to this
rule is when all socket 2 DIMM slots are empty.
Because of these requirements, the minimal DIMM population is {A1, B1}. In this
configuration, processor cores on socket 2 suffer memory latency from the remote
memory on socket 1. An optimal DIMM population for channel mirroring in a DP server