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Register map – Rainbow Electronics AT75C220 User Manual

Page 36

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AT75C220

36

hash matched frames. So all multicast frames can be
received by setting all bits in the hash register.

The CRC algorithm reduces the destination address to a 6-
bit index into a 64-bit hash register. If the equivalent bit in
the register is set, the frame will be matched depending on

whether the frame is multicast or unicast and the appropri-
ate match signals will be sent to the DMA block

If the copy all frames bit is set in the network configuration
register, the store frame pulse will always be sent to the
DMA block as soon as any destination address is received.

Register Map

Base Address MAC A: 0xFF034000

Base Address MAC B: 0xFF038000

Table 15. Ethernet MAC Register Map

Offset

Register Name

Description

Access

Reset Value

0x00

ETH_CTL

Network Control Register

Read/write

0x0

0x04

ETH_CFG

Network Configuration Register

Read/write

0x800

0x08

ETH_SR

Network Status Register

Read-only

0x4

0x0C

ETH_TAR

Transmit Address Register

Read/write

0x0

0x10

ETH_TCR

Transmit Control Register

Read/write

0x0

0x14

ETH_TSR

Transmit Status Register

Read/write

0x18

0x18

ETH_RBQP

Receive buffer queue pointer

Read/write

0x0

0x1C

Reserved

Read-only

0x0

0x20

ETH_RSR

Receive Status Register

Read/write

0x0

0x24

ETH_ISR

Interrupt Status Register

Read/write

0x0

0x28

ETH_IER

Interrupt Enable Register

Write-only

0x2C

ETH_IDR

Interrupt Disable Register

Write-only

0x30

ETH_IMR

Interrupt Mask Register

Read-only

0xFFFF

0x34

ETH_MAN

PHY Maintenance Register

Read/write

0x0

Statistics Registers

0x40

ETH_FRA

Frames transmitted OK

Read/write

0x0

0x44

ETH_SCOL

Single collision frames

Read/write

0x0

0x48

ETH_MCOL

Multiple collision frames

Read/write

0x0

0x4C

ETH_OK

Frames received OK

Read/write

0x0

0x50

ETH_SEQE

Frame check sequence errors

Read/write

0x0

0x54

ETH_ALE

Alignment errors

Read/write

0x0

0x58

ETH_DTE

Deferred transmission frames

Read/write

0x0

0x5C

ETH_LCOL

Late collisions

Read/write

0x0

0x60

ETH_ECOL

Excessive collisions

Read/write

0x0

0x64

ETH_CSE

Carrier sense errors

Read/write

0x0

0x68

ETH_TUE

Transmit underrun errors

Read/write

0x0

0x6C

ETH_CDE

Code errors

Read/write

0x0

0x70

ETH_ELR

Excessive length errors

Read/write

0x0