Rainbow Electronics RF22 - Manual (Page 21)

RF22
Version: 0.1 Date: 12/23/2008
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■ RX Demodulation
■ AGC
■ Preamble Detector
■ Invalid Preamble Detector
■ Radio Signal Strength Indicator (RSSI)
■ Automatic Frequency Compensation (AFC)
■ Packet Handling including EZMac TM features
■ Cyclic Redundancy Check (CRC)
The digital Channel Filter and Demodulator are optimized for ultra low power consumption and are highly configurable.
Supported modulation types are GFSK, FSK, and OOK. The Channel Filter can be configured to support a large choice
of bandwidths ranging from 620 kHz down to 2.6 kHz. A large variety of data rates are supported ranging from 1 up to
128 kbps. The AGC algorithm is implemented digitally using an advanced control loop optimized for fast response time.
The configurable Preamble Detector is used to improve the reliability of the Sync-word detection. The Sync-word
detector is only enabled when a valid preamble is detected, significantly reducing the probability of false Sync-word
detection.
The Invalid Preamble Detector issues an interrupt when no valid preamble signal is found. After the receiver is enabled,
the Invalid Preamble Detector output is ignored for 16 Tb (Where Tb is the time of a bit duration) to allow the receiver to
settle. The Invalid Preamble Detect interrupt can be used to save power and speed-up search in receive mode. It is
advised to mask the invalid preamble interrupt when Antenna Diversity is enabled.
The Received Signal Strength Indicator (RSSI) provides a measure of the signal strength received on the tuned
channel. The resolution of the RSSI is 0.5 dB. This high resolution RSSI enables accurate channel power
measurements for clear channel assessment (CCA), carrier sense (CS), and listen before talk (LBT) functionality.
Frequency mistuning caused by crystal inaccuracies can be compensated by enabling the digital Automatic Frequency
Control (AFC) in receive mode.
A comprehensive programmable Packet Handler including key features of HopeRFs’ EZMac
TM is integrated to create a
variety of communication topologies ranging from peer-to-peer networks to mesh networks. The extensive
programmability of the packet header allows for advanced packet filtering which in turn enables a mix of broadcast,
group, and point-to-point communication.
A wireless communication channel can be corrupted by noise and interference, and it is therefore important to know if
the received data is free of errors. A cyclic redundancy check (CRC) is used to detect the presence of erroneous bits in
each packet. A CRC is computed and appended at the tail of each transmitted packet and verified by the receiver to
confirm that no errors have occurred. The Packet Handler and CRC are extremely valuable features which can
significantly reduce the load on the system microcontroller allowing for a simpler and cheaper microcontroller.
The digital modem includes the TX Modulator which converts the TX Data bits into the corresponding stream of digital
modulation values to be summed with the fractional input to the sigma-delta modulator. This modulation approach
results in highly accurate resolution of the frequency deviation. A Gaussian filter is implemented to support GFSK,
considerably reducing the energy in the adjacent channels. The bandwidth-time product (BT) is 0.5 for all programmed
data rates.
5.6. Synthesizer
An integrated Sigma-Delta (Σ-Δ) Fractional-N PLL synthesizer capable of operating from 240–930 MHz is provided
on-chip. Using a Σ-Δ synthesizer has many advantages; it provides large amounts of flexibility in choosing data rate,
deviation, channel frequency, and channel spacing. The transmit modulation is applied directly to the loop in the digital
domain through the fractional divider which results in very precise accuracy and control over the transmit deviation.
The PLL and Σ-Δmodulator scheme is designed to support any desired frequency and channel spacing in the range
from 240–930 MHz with a frequency resolution of 156.25 Hz (Low band) or 312.5 Hz (High band). The transmit data