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Intel SE7525GP2 User Manual

Page 54

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Intel® Server Board SE7320SP2 & Intel Server Board SE7525GP2 TPS

Functional Architecture

Revision 2.0

54

Both boards support an 8MB (512Kx32bitx4 Banks) SDRAM device for video memory. The
following table shows the video memory interface signals:

Table 12: Video Memory Interface

Signal Name

I/O Type

Description

CAS#

O

Column Address Select

CKE

O

Clock Enable for Memory

CS#[1..0] O Chip

Select for Memory

DQM[7..0] O

Memory Data Byte Mask

DSF

O

Memory Special Function Enable

HCLK O Memory

Clock

[11..0]

O

Memory Address Bus

MD[31..0] I/O Memory Data Bus

RAS# O Row

Address

Select

WE# O

Write

Enable


3.6.7

Network Interface Controller (NIC)

3.6.7.1 Intel

82541

The Intel 82541 gigabit network interface controller supplies the server board with a single
network interface. The 82541 controller is capable of supporting 10/100/1000 operation and
alert-on-LAN functionality. The controller can be disabled by using the BIOS Setup Utility
accessed during POST. The 82541 supports the following features:

32-bit PCI Rev. 2.3 compliant master interface

Integrated IEEE 802.3 10Base-T, 100Base-TX and 1000Base-TX compatible PHY

IEEE 820.3ab auto-negotiation support

Full duplex support at 10 Mbps, 100Mbps and 1000 Mbps operation

Integrated UNDI ROM support

• MDI/MDI-X and HWI support

3.6.7.2

NIC Connector and Status LEDs

The Intel 82541 network controller drives two LEDs located on the network interface connector.
The link/activity LED (to the left of the connector) indicates network connection when on, and
Transmit/Receive activity when blinking. The speed LED (to the right of the connector) indicates
1000-Mbps operations when amber, 100-Mbps operations when green, and 10-Mbps when off.

3.6.8

USB 2.0 Support

The USB controller functionality integrated into Intel 6300ESB I/O Controller provides the server
board with the interface for up to four USB 2.0 ports. Two external connectors are located on
the back edge of the server board. One internal 2x5 header is provided which is capable of
supporting an additional 2 optional connectors.

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