Intel CHIPSET 820E User Manual
Page 217
3-20-2000_11:31
21
LAN
R378
51.1
1%
25MHZ
Y5
1
2
20MHZ
Y2
2
1
9,15
EE_DOUT_ICH2
9,15
EE_SHCLK_ICH2
15
EE_CS_ICH2_OB
1%
51.1
R376
10%
0.022UF
C365
R377
R380
U22
8
3
4
2
1
5
6
7
17,18
LAN_CLK_X1
17,18
LAN_CLK_X2
1%
10K
R382
1%
121
R381
5%
C302
82PF
5%
82PF
C291
18,19,20
LAN_RDP
18,19,20
LAN_RDM
17
GILAD_RDM
17
GILAD_RDP
1%
806
R379
R95
806
1%
9,15
EE_DIN_ICH2
VCC3_3SBY
XTAL
DRAWN BY:
LAST REVISED:
SHEET:
FOLSOM, CALIFORNIA 95630
1900 PRAIRIE CITY ROAD
87
6
5
4
3
2
1
A
B
C
D
1
2
3
4
5
6
7
8
D
C
B
A
PCG PLATFORM DESIGN
REV:
0.5
PROJECT:
OF 40
TITLE: INTEL(R) 820E CHIPSET 2 DIMM FCPGA REFERENCE BOARD
R
PCG AE
Camino2
XTAL
0K
0K
NC2
NC1
GND
EECS
EESK
EEDO
EEDI
VCC
93C46
VCC3_3SBY
LAN
STUFF FOR
82562EH
ONLY
S
T
UF
F
ING
F
O
R E
E
P
RO
M
(
U
2
2
)
L
A
N
OP
T
ION
IN
T
E
L
P
A
R
T
#
82562EH
A
05
4
82
-0
0
1
82562E
T
A
05
4
41
-0
0
1
82562E
M
A
05
7
23
-0
0
1
82562EM
w
it
h
A
O
L
S
t
u
ff
i
n
g
O
p
t
i
o
n
s
fo
r
82
56
2
E
H
a
n
d
82
56
2
E
T/
E
M
8
2
56
2
EH
R
em
o
v
e
Y
5
C
2
91
a
n
d
C
3
02
=
8
2
p
f
R
3
8
1
=
1
2
1
o
h
m
s
8
25
6
2
ET
/EM
R
em
o
v
e
Y
2
C
2
91
an
d C
3
02=
2
2
p
f
R
3
81
=
0
oh
m
s
Re
m
o
v
e
R3
8
2