Figure 78. decoupling capacitor layout – Intel CHIPSET 820E User Manual
Page 123
Intel
®
820E Chipset
R
Design Guide
123
Figure 78. Decoupling Capacitor Layout
3.3 V Core
1.8 V Core
1.8 V Standby
3.3 V Standby
3.3 V Core
1.8 V Standby
5 V Ref
ICH2_decoupling_cap
The previous figure shows the layout of the ICH2 decoupling capacitors for various power planes around
the ICH2. The decoupling caps are circled, with an arrow pointing to the power plane/trace to which they
are connected.
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