Maxim Integrated MAXQ622 User Manual
Page 78

MAXQ612/MAXQ622 User’s Guide
Maxim Integrated
5-5
Table 5-3. Peripheral Register Reset Values (continued)
REG
BIT
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
TB0CN
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TB1R
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TB1CN
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
IRCN
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
IRCA
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
IRMT
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
IRCNB
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TB0C
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TB0V
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TB1C
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TB1V
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
IRV
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
SCON0
0
0
0
0
0
0
0
0
SBUF0
0
0
0
0
0
0
0
0
SCON1
0
0
0
0
0
0
0
0
SBUF1
0
0
0
0
0
0
0
0
SPIB0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
SPICN0
0
0
0
0
0
0
0
0
SPIB1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
SPICN1
0
0
0
0
0
0
0
0
PR0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
SMD0
0
0
0
0
0
0
0
0
PR1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
SMD1
0
0
0
0
0
0
0
0
SPICF0
0
0
0
0
0
0
0
0
SPICK0
0
0
0
0
0
0
0
0
SPICF1
0
0
0
0
0
0
0
0
SPICK1
0
0
0
0
0
0
0
0
I2CCN
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
I2CST
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
I2CBUF
0
0
0
0
0
0
0
0
I2CIE
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
UADDR
0
0
0
0
0
1
0
0
UDATA
0
0
0
0
0
1
0
0
I2CCK
0
0
0
0
0
0
1
0
0
0
0
0
0
1
0
0
I2CTO
0
0
0
0
0
1
0
0
I2CSLA
0
0
0
0
0
0
0
0
0
0