Maxim Integrated MAXQ622 - Manual (Page 255)

MAXQ612/MAXQ622 User’s Guide
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent
licenses are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and
max limits) shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
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REVISION HISTORY
REVISION
NUMBER
REVISION
DATE
SECTION
NUMBER
DESCRIPTION
PAGES
CHANGED
0 6/10 — Initial release —
1 7/10
12
Changed USBCFG bits 2:1 from SOFO and BACTO to reserved in
Section 12.4.3: USB Configuration Register (USBCFG); added a note
about the self-clearing mechanism for USBIEN and EPIEN bits to
Section 12.4.4: USB Interrupt Enable Register (USBIEN) and Section
12.4.6: Endpoint Interrupt Enable Register (EPIEN) .
12-6, 12-7,
12-8
14
Added two bullet points to Section 14.3.5: Debug Mode Special
Considerations to explain how to debug UAPP/ULDR and note that the
stack plug-in should be disabled .
14-11
2 2/13
2
Updated reference to connect HFXOUT to GND in Section 2 .7 .2 (was
“leave HFXOUT unconnected”) .
2-25
2 Corrected references of IPV register to IVP register 2-27, 2-28
5
Changed PWCN register bits 15:10 from Reserved to PFWARNCN[1:0],
CKRY, CTM, CTMS, and FRCVDD; added full descriptions (Table 5-2)
5-3, 5-13
9 Corrected reference of “2:1” to “1:2” for SCON register bits 6:5 9-10