HP 220 - Manual (Page 56)

5Ć24 Functional Overview C3187Ć90000
Processor Support ASIC
The processor support ASIC provides support for the main processor, and an interface
between the main processor and the servo processor.
Shuffler ASIC and Swath Memory
The shuffler ASIC and the swath memory shuffle the rowĆoriented image data in the system
memory into columnĆoriented nozzle data needed by the print cartridges. The shuffling is
accomplished by copying an entire swath of image data from the system memory into the
swath memory, then fetching the pixel data from swath memory for each cartridge nozzle
according to the shuffle pattern in the ASIC address sequencer. The shuffled data is
transferred serially to the nozzleĆtiming ASIC located on the carriage.
Input/Output Interfaces
The plotters have both a parallel (BiĆTronics) and a serial (RSĆ232) interface. These I/Os are
controlled by the main processor.
Parallel Input/Output Hardware The parallel interface is compliant with IEEE standard
1284 (BiĆTronics).
The parallel port has a standard female 1284ĆB 36Ćpin connector (the same connector as
standard Centronics).
Hosts with 1284Ćcompliant parallel interfaces (including standard PCs with the appropriate
parallelĆport software) are able to communicate with the plotter bidirectionally. Hosts with
standard Centronics hardware (such as traditional PCs) are able to operate with the plotter
as they do with standard Centronics devices.
What is BiĆTronics BiĆTronics is a signaling method for a speedĆadaptive, fully interlocked,
bidirectional parallel communications channel between a peripheral and a host. The features
of BiĆTronics are:
D Provides the capability to send data from the host computer to the plotter at a higher
speed, by shortening the signal timing values.
D Provides a path for data to be sent from the plotter to the host, such as solicited and
unsolicited status (media jam, plot finished, etc.)
D Reduced user interaction: The host software can request information of the plotter
directly (such as amount of available memory?") instead of prompting the user.
D The specification allows PCs with existing parallelĆport hardware to participate in
bidirectional communication with a peripheral by installing new parallelĆport driver
software; no new PC hardware is necessary.
The IEEEĆ1284 specification provides for two levels of compliance for the electrical
characteristics of an interface. The interface for the plotters meets the Level 1 electrical
requirements.
The IEEEĆ1284 specification defines five modes of operations for an interface. The interface
for the plotters implements Compatibility and Nibble modes.
HostĆtoĆperipheral dataĆtransfer handshaking is performed by a hardware state machine.
PeripheralĆtoĆhost handshaking is performed by the main processor in response to an
interrupt.