2 block diagram, Core cpu s1c88, Epson – Epson S1C88650 User Manual
Page 10: 1 introduction

2
EPSON
S1C88650 TECHNICAL MANUAL
1 INTRODUCTION
1.2 Block Diagram
Core CPU S1C88
Interrupt Controller
System Controller
Input Port
Oscillator
OSC1, 2
OSC3, 4
Reset/Test
RESET
TEST
Watchdog Timer
K00–K02
K03 (BREQ)
K04–K07
I/O Port
Serial Interface
External
Memory Interface
Output Port
Programmable Timer
/Event Counter
Clock Timer
Power Generator
RAM
8K bytes
EXCL0–EXCL3 (K04–K07)
TOUT0–TOUT3 (P14, P15)
TOUT2/TOUT3 (P17)
P00–P07 (D0–D7)
P10 (SIN)
P11 (SOUT)
P12 (SCLK)
P13 (SRDY)
R00–R07, R10–R17, R20–R23
(A0–A7, A8–A15, A16–A19)
R24, R25 (RD, WR)
R30–R32 (CE0–CE2)
R33 (BACK)
SEG0–SEG125
COM0–COM31
P14 (TOUT0/TOUT1)
P15 (TOUT2/TOUT3)
P16 (FOUT)
P17 (TOUT2/TOUT3)
V
DD
V
SS
V
D1
V
D2
V
C1
–V
C5
CA–CG
LCD Driver
ROM
48K bytes+896K bytes
Supply Voltage Detector
MCU/MPU
BREQ (K03)
BACK (R33)
Fig. 1.2.1 S1C88650 block diagram
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