Dataman 40Pro - Manual (Page 114)

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The sRAM test is done in 3 basic steps:
Test of data drivers functionality.
Drivers test ... test of D0..D7 signals reaction on CE\, OE\ and WE\:
- in first cycle write data 0x55 to the address 0x0 (CE/=L WE/=L OE/=H) and compare
with data read from same address (CE/=L WE/=H OE/=L), data have to be valid.
- then other combination control pins (CE/=L WE/=H OE/=H), (CE/=H WE/=H OE/=L), ...,
is set and data have to be not valid - data bus driver have to be inactive.
sRAM test, basic part.
Programmer here write random data to sRAM device and then verify the content.
3) RAM test, advanced (optional).
"Walking one" and "Walking zero" are common terms, who need explanation can study:
http://www.google.com/search?q=memory+test+walking+one
http://www.google.com/search?q=memory+test+walking+zero
Notes:
- it is possible to select a delay between write operation and succeeding verify of
programmed data (at condition the device is supplied) in intent to detect 'leak' of the bits.
- programmer haven't capability to detect errors like too big current on the signal pins or
such "analog" errors
- all tests are done at low frequency (meant compared with maximal speed of tested
device), therefore usage of such test is limited
Conclusions:
- the device programmer can provide only basic answer about health of the sRAM
- if you need test sRAM more deeply use please specialized sRAM tester.
Device / IC test
This command activates a test section for ICs, mainly Standard Logic IC. The ICs are sorted
by type of technology to groups/libraries.
First select an appropriate library, wished device and then a mode for test vectors run (LOOP,
SINGLE STEP). Control sequence and test results are displayed to Programmer activity log.
In case of need, it is possible to define the test vectors directly by user. Detailed description
of syntax and methods of creation testing vectors is described in example_e.lib file, which is
in programs installation folder.
Note.
Testing of IC is done using test vectors at some (pretty low) speed. The tests by test vectors
can not detect all defects of the chip. Other words, if IC test report "FAIL", then device is
defective. But if is "PASS" reported, it mean the chip passed our tests, but still might not pass
the tests, that check other - mainly dynamic - parameters of the tested IC.
Because the rising/falling edges of programmers are tuned for programming of chips, it may
happen the test of some chips fails, although the chips aren't defective (counters for
example).