Hmc controller ip core example design, Hmc controller ip core example design -1 – Altera Hybrid Memory Cube Controller User Manual
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HMC Controller IP Core Example Design
6
2015.05.04
UG-01152
Altera provides a compilation-ready example design with the HMC Controller IP core. This example
design targets the Arria 10 GX FPGA Development Kit with an HMC mezannine card connected through
the FMC connectors.
You can use the design as an example for correct connection of your IP core to your design, or as a starter
design you can customize for your own design requirements. The example design includes an I
2
C master
module, one external transceiver PLL IP core, and logic to generate and check transactions. The example
design assumes a Micron HMC 15G-SR HMC device, which is a four-link device, on the mezannine card.
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