Altera Hybrid Memory Cube Controller - Manual (Page 45)

When the HMC Controller IP core deasserts the
dp_req_ready
signal, user logic maintains the current
values until a full clock cycle after the IP core reasserts
dp_req_ready
. User logic is required to send the
values while
dp_req_ready
is asserted, to ensure that the IP core captures them correctly.
The IP core asserts the
dp_rsp_error
signal while sending the response to the WR128 request. This signal
indicates that the WR128 request did not complete successfully. The IP core passes this information
through from the HMC device; therefore, this signal indicates that the HMC device encountered an error
while attempting to implement the request.
HMC Interface Signals
The HMC Controller IP core's HMC interface connects to the external HMC device's link interface and
main reset signal.
Table 4-3: Signals of the HMC Interface
Signal Name Direction Description
hmc_lxrx[15:0]
(for full-width
IP cores)
hmc_lxrx[7:0]
(for half-width
IP cores)
Input
Receiving lanes. Implements HMC specification
LxRXP
and
LxRXN
differential pairs.
You must connect this data bus to the HMC device
LxTXP
bus. The Quartus II Fitter assigns the correct pin to the
negative signal automatically.
hmc_lxtx[15:0]
(for full-width
IP cores)
hmc_lxtx[7:0]
(for half-width
IP cores)
Output
Transmitting lanes. Implements HMC specification
LxTXP
and
LxTXN
differential pairs.
You must connect this data bus to the HMC device
LxRXP
bus. The Quartus II Fitter assigns the correct pin to the
negative signal automatically.
hmc_lxrxps Input
Link power reduction input. Implements HMC specifica‐
tion
LxRXPS
signal. The HMC Controller IP core does not
use this signal, but provides it to comply with the HMC
specification.
You should connect this input signal to the HMC device
LxTXPS
output signal.
hmc_lxtxps Output
Link power reduction output. Implements HMC specifica‐
tion
LxTXPS
signal.
You must connect this input signal to the HMC device
LxRXPS
output signal.
hmc_ferr_n Input
Active-low fatal error indication from the HMC device.
You must connect this signal to the HMC device
FERR_N
signal.
hmc_p_rst_n Output Main reset signal to the HMC device.
You must connect this signal to the HMC device
P_RST_N
signal.
4-8 HMC Interface Signals
UG-01152
2015.05.04
Altera Corporation HMC Controller IP Core Signals
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