Rockwell Automation T8160 Trusted TMR Interface - Manual (Page 74)

Trusted TM TMR Module T8160
Issue 13 May 13 PD-T8160 74
5. Operation
Figure 3 shows the simplified architectural block diagram of a TMR Interface processor sub-system.
Figure 3 Architectural Block Diagram of
Processor Sub-System A
During normal operation, module transition between ‘Active’ and ‘Standby’ modes is under the control
of the Trusted
TM TMR Processor.
The module scans the I/O sub-system via the I/O Safetybus and exchanges data with the Trusted TM
TMR Processor. Data from inputs is read from the I/O modules in the I/O assembly. Outputs are
driven by transmitting data through the I/O processor to the I/O assembly. The Trusted
TM TMR
Interface can communicate with sixteen I/O chassis’, each with up to ten I/O modules.
Communications between the Trusted TM TMR Processor and the I/O processor are maintained through
shared RAM; used as a mail box‘ for data transfers between the two.
All three processor sub-systems operate in lock-step synchronisation with each other, continuously
repeating a scan cycle (Figure 4).
Figure 4 Trusted
TM
TMR Processor / Trusted
TM
TMR Interface I/O Processor Scan Cycle
The I/O processors in each sub-system read and write I/O synchronously. During these synchronous
operations, all instructions and data are distributed across the Safetybus where automatic voting and
error detection occur.