Rockwell Automation SA3100 Power Module Interface (PMI) Regulator - Manual (Page 26)

2-10 PMI Regulator
2.2.2 AC Power Technology Circuit
The AC power technology circuit provides the gate firing signals to control the six
power devices in the AC Power Module. This circuit compares the flux current and
torque current reference values received from the PMI processor to feedback data
received from the Power Module to perform the calculations required to generate the
pulse-width-modulated (PWM) signals that fire the gates in the AC Power Module.
The PMI processor sends the torque and flux current references (Iq and Id,
respectively) to the AC power technology circuit every UDC scan. The AC power
technology section uses these signals as references into two independent control
loops (Proportional and Integral function blocks), one for Iq and one for Id. The output
of these “PI” blocks can be read by the PMI processor for diagnostic and control
purposes.
These current loops are adjusted by three tunable gains in the UDC task,
STATOR_R_E4% (stator resistance), STATOR_T_E4% (stator time constant), and
CML_WCO% (current minor loop crossover frequency). The output of the torque PI
block produces a torque voltage reference, and the output of the flux PI block
produces a flux voltage reference.
The torque and flux voltage reference values are used to create three-phase sine
waves, which along with the triangle waveform generated by this circuit, are used to
generate the PWM signals that fire the gates in the AC Power Module. Harmonic
injection is performed to allow the line-to-line output voltage to be increased by 15%
for a given input voltage. Interlock circuitry ensures that the upper and lower power
devices of one phase (U, V, or W) are never turned on at the same time.
The AC power technology circuit includes a field-programmable gate array (FPGA)
which is configured at power-up or after a reset signal has been asserted by the PMI
processor. An FPGA configuration failure will prevent the DRV RDY LED from turning
on. After the operating system has been downloaded from the UDC module,
diagnostics are performed on the AC power technology circuit. If any of these
diagnostics fails, the DRV RDY LED will turn off.
If any drive faults are detected, the gate signals are turned off. Gate power is also
removed 0.5 seconds after the RPI signal to the Resolver & Drive I/O board is
removed.
In addition, the circuitry monitors the Regulator board’s power supplies. If any of the
power supplies drop below the required level, the gates are disabled, the pre-charge
enable signal is removed, and the drive is shut down.
The power technology circuit includes a watchdog timer which is reset by the PMI
processor. If the watchdog is not reset within a specified time, it will time out. If a time-
out occurs, the gates are disabled. To recover from a watchdog time-out, power must
be cycled to the PMI Regulator. Bit 11 of UDC dual port register 202/1202 is set if the
watchdog times out
A functional block diagram of the AC power technology circuit is shown in figure 2.5.