Appendix a: oit settings, Ascii host to oit communications settings – Maple Systems OIT Family (ASCII) User Manual
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APPENDIX A: OIT Settings
ASCII Host to OIT Communications Settings
When starting a new project file for the OIT using OITware 200, you must enter the Configu-
ration Editor to configure the communications settings that the OIT will use when connect-
ing to the ASCII host. Use the suggested default settings given below unless the ASCII
host’s communications parameters are different.
Message Request Register
Default:
D500
Range:
D0 to D1023
The message request register is the 16-bit OIT register that the OIT checks to see if the ASCII
host wants to display a screen. The default is D500 but you can choose any 16-bit register in
the Data (D) Register range of 0 to 1023.
Note: The ASCII host can write to this register using the Write OIT Memory control
command but screens can also be displayed by using the Display Screen control
command.
Current Message Register (optional)
Default:
D502
Range:
D0 to D1023
The current message register is the 16-bit OIT register where the OIT stores the screen num-
ber of the currently displayed screen. This register is optional and, by default, is not used.
The default address is D502 but you can choose any 16-bit register in the Data (D) Register
range of 0 to 1023.
Note: If the current message register is used, the address should not coincide with the address
used for the message request register.
Function Key Coils
Default:
C960
Range:
C0 to C1023
The function key coils register is the 16-bit register that the OIT writes to whenever the func-
tion keys are used as push on/push off, latch, or momentary switches. The default is
C960-975, but you can choose any 16 bit register in the Coil (C) Register range of 0 to 1023.
Status Coils
Default:
C928
Range:
C0 to C1023
The status coils register is the 16-bit register that the OIT reads/writes to for status bit infor-
mation that is shared by the OIT and the ASCII host. The default is C928-943, but you can
choose any 16 bit register in the Coil (C) Register range of 0 to 1023.
Note: If the “Notify Host of Read/Write Register Monitor Updates” feature is enabled, the
OIT will not notify the ASCII host when the Invalid Display Message Number status bit
is changed.
OIT SETTINGS
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