Message request register (mrr), Current message register (cmr), Status bit coils – Maple Systems OIT Family (ASCII) User Manual
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Message Request Register (MRR)
The Message Request Register is an OIT data register that is continuously monitored by the
OIT. When the ASCII host enters a number into this register, the OIT:
•
displays the screen that corresponds to that number
•
performs any special function associated with the screen
•
and optionally sends the screen’s contents to a serial printer.
The ASCII host can write to the MRR in two ways: by sending the Display Screen control
command or by directly writing to the MRR data register using the Write OIT Memory con-
trol command.
Current Message Register (CMR)
The OIT can be programmed to send the number representing the screen currently displayed
on the OIT to an OIT data register called the Current Message Register. The OIT can be pro-
grammed to place numbers into the CMR in binary decimal or BCD format. This register can
be used by the ASCII host to determine which screen is shown on the OIT. This might be
used to determine if a specific alarm screen has been acknowledged by the OIT operator. It
might also be used to determine which screen in a chained sequence the OIT operator is cur-
rently seeing. To enable/disable the CMR and specify the address location, use the OITware
200 configuration software.
Status Bit Coils
The Status Bit coils are a block of discrete OIT coil registers used to communicate informa-
tion to the ASCII host. The Status Bit coils are used in the following manner:
Status Bit Address (offset)
Name
+0 . . . . . . . . . . . . . . . . . . Reserved for OIT (do not use)
+1 . . . . . . . . . . . . . . . . . . Invalid Display Message Number bit
+2 . . . . . . . . . . . . . . . . . . Message/Keytable Error bit
+3 . . . . . . . . . . . . . . . . . . Reset bit
+4 . . . . . . . . . . . . . . . . . . Alarm Stack Full bit
+5 . . . . . . . . . . . . . . . . . . Message Stack Full bit
+6 . . . . . . . . . . . . . . . . . . Message Stack Empty bit
+7 . . . . . . . . . . . . . . . . . . Clear Alarm bit
+8 . . . . . . . . . . . . . . . . . . Clear Alarm Stack bit
+9 . . . . . . . . . . . . . . . . . . Reserved for OIT (do not use)
+10 . . . . . . . . . . . . . . . . . Reserved for OIT (do not use)
+11 . . . . . . . . . . . . . . . . . Alarm Stack Empty bit
+12 . . . . . . . . . . . . . . . . . Acknowledge Alarm bit
+13 . . . . . . . . . . . . . . . . . Reserved for future use
+14 . . . . . . . . . . . . . . . . . Reserved for future use
+15 . . . . . . . . . . . . . . . . . Reserved for future use
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OIT Family Operation Manual (ASCII)
1010-0088, REV02