Rainbow Electronics ATmega64L - Manual (Page 264)

264
ATmega16(L)
2466B–09/01
Figure 134. Parallel Programm ing Timing, Loading Sequence with Timing
Requirements
(1)
Note: 1. The timing requirements shown in Figure 133 (i.e., t
DVXH
, t
XHXL
, and t
XLDX
) also apply
to loading operation.
Figure 135. Parallel Programming Timing, Reading Sequence (within the same Page)
with Timing Requirements
(1)
Note: 1. The timing requirements shown in Figure 133 (i.e., t
DVXH
, t
XHXL
, and t
XLDX
) also apply
to reading operation.
XTAL1
PAGEL
t
PLXH XLXH
t
t
XLPH
ADDR0 (Low Byte) DATA (Low Byte) DATA (High Byte) ADDR1 (Low Byte) DATA
BS1
XA0
XA1
LOAD ADDRESS
(LOW BYTE)
LOAD DATA
(LOW BYTE)
LOAD DATA
(HIGH BYTE)
LOAD DATA LOAD ADDRESS
(LOW BYTE)
XTAL1
OE
ADDR0 (Low Byte) DATA (Low Byte) DATA (High Byte) ADDR1 (Low Byte) DATA
BS1
XA0
XA1
LOAD ADDRESS
(LOW BYTE)
READ DATA
(LOW BYTE) READ DATA
(HIGH BYTE)
LOAD ADDRESS
(LOW BYTE)
t
BVDV
t
OLDV
t
XLOL
t
OHDZ