Rainbow Electronics ATmega64L - Manual (Page 119)

119
ATmega16(L)
2466B–09/01
Figure 59. Phase Correct PWM Mode, Timing Diagram
The Timer/Counter overflow flag ( TOV2 ) is set each time the counter reaches BOTTOM.
The interrupt flag can be used to generate an interrupt each time the counter reaches
the BOTTOM value.
In phase correct PWM mode, the compare unit allows generation of PWM waveforms on
the OC2 pin. Setting the COM21:0 bits to 2 will produce a non-inverted PWM. An
inverted PWM output can be generated by setting the COM21:0 to 3 (see Table 53 on
page 123). The actual OC2 value will only be visible on the port pin if the data direction
for the port pin is set as output. The PWM waveform is generated by clearing (or setting)
the OC2 register at the compare match between OCR2 and TCNT2 when the counter
increments, and setting (or clearing) the OC2 register at compare match between OCR2
and TCNT2 when the counter decrements. The PWM frequency for the output when
using phase correct PWM can be calculated by the following equation:
The N variable represents the prescale factor (1, 8, 32, 64, 128, 256, or 1024).
The extreme values for the OCR2 register represent special cases when generating a
PWM waveform output in the phase correct PWM mode. If the OCR2 is set equal to
BOTTOM, the output will be continuously low and if set equal to MAX the output will be
continuously high for non-inverted PWM mode. For inverted PWM the output will have
the opposite logic values.
Timer/Counter Timing
Diagrams The following figures show the Timer/Counter in synchronous mode, and the timer clock
(clk
T2
) is therefore shown as a clock enable signal. In asynchronous mode, clk
I/O
should
be replaced by the Timer/Counter Oscillator clock. The figures include information on
when interrupt flags are set. Figure 60 contains timing data for basic Timer/Counter
operation. The figure shows the count sequence close to the MAX value in all modes
other than phase correct PWM mode.
TOVn Interrupt Flag Set
OCn Interrupt Flag Set
1 2 3
TCNTn
Period
OCn
OCn
(COMn1:0 = 2)
(COMn1:0 = 3)
OCRn Update
f
O Cn PCPW M
f
clk_I/O
N 510
⋅
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