Rainbow Electronics ATA5812 - Manual (Page 42)

42
ATA5811/ATA5812 [Preliminary]
4689B–RKE–04/04
Pin PWR_ON To switch the transceiver from OFF to Idle mode, pin PWR_ON must set to 1 (minimum
0.8
× V
VS2
) for at least T
PWR_ON
(see Figure 30). The transceiver recognize the positive
edge, sets pin N_RESET to low and switches on DVCC, AVCC and the power supply for
external devices VSOUT.
If V
DVCC
exceeds 1.5 V (typically) and the XTO is settled, the digital control logic is active
and sets the status bit Power_On to 1 and an interrupt is issued (T
PWR_ON_IRQ_1
).
After the voltage on pin VSOUT exceeds 2.3 V (typically) and the start-up time of the
XTO is elapsed the output clock on pin CLK is available. Because the enabling of pin
CLK is asynchronous the first clock cycle may be incomplete. N_RESET is set to high if
V
VSOUT
exceeds 2.38 V (typically) and the XTO is settled.
If the transceiver is in any active mode (Idle, AUX, RX, RX_Polling, TX), a positive edge
on pin PWR_ON sets Power_On to 1 (after T
PWR_ON_IRQ_2
). The state transition
Power_On 0
→
1 generates an interrupt. If Power_On is still 1 during the positive edge
on pin PWR_ON no interrupt is issued. Power_On and the interrupt is deleted after
reading the status register.
During Power_On = 1, the bits VSOUT_EN and CLK_ON in control register 3 are set
to 1.
Note: It is not possible to set the transceiver to OFF mode by setting pin PWR_ON to 0. If pin
PWR_ON is not used, it must be connected to GND.
Figure 30. Timing Pin PWR_ON, Status Bit Power_On
VSOUT
PWR_ON
N_RESET
IRQ
Power_On
(Status Register)
CLK
OFF
Mode
IDLE
Mode
IDLE, AUX, RX, RX Polling, TX
Mode
DVCC, AVCC
1.5 V (typ)
T
PWR_ON_IRQ_2
T
PWR_ON
> T
PWR_ON_IRQ_1
V
Thres_1
= 2.3 V (typ)
T
PWR_ON_IRQ_1
V
Thres_2
= 2.38 V (typ)
T
PWR_ON
> T
PWR_ON_IRQ_2