Rainbow Electronics T89C51CC02 - Manual (Page 65)

Rev.A - May 17, 2001 65
Preliminary
T89C51CC02
14.2. WatchDog Programming
The three lower bits (S0, S1, S2) located into WDTPRG register permits to program the WDT duration.
Table 18. Machine Cycle Count
To compute WD Time-Out, the following formula is applied:
Note: Svalue represents the decimal value of (S2 S1 S0)
Find Hereafter computed Time-Out value for Fosc
XTAL
= 12MHz
Table 19. Time-Out Computation
S2 S1 S0 Machine Cycle Count
0 0 0 2 14 - 1
0 0 1 2
15
- 1
0 1 0 2 16 - 1
0 1 1 2
17
- 1
1 0 0 2 18 - 1
1 0 1 2
19
- 1
1 1 0 2 20 - 1
1 1 1 2
21
- 1
S2 S1 S0 Fosc=12MHz Fosc=16MHz Fosc=20MHz
0 0 0 16.38 ms 12.28 ms 9.82 ms
0 0 1 32.77 ms 24.57 ms 19.66 ms
0 1 0 65.54 ms 49.14 ms 39.32 ms
0 1 1 131.07 ms 98.28 ms 78.64 ms
1 0 0 262.14 ms 196.56 ms 157.28 ms
1 0 1 524.29 ms 393.12 ms 314.56 ms
1 1 0 1.05 s 786.24 ms 629.12 ms
1 1 1 2.10 s 1.57 s 1.25 ms
FTime Out
F
XTAL
12 2
14
2
Svalue Ч ( )
1 –
( ) Ч
------------------------------------------------------------- = –