Rainbow Electronics T89C51CC02 - Manual (Page 128)

128 Rev.A - May 17, 2001
Preliminary
T89C51CC02
IPH1 (S:F7h)
Interrupt high priority Register 1
Reset Value = XXXX X000b
Figure 132. IPH1 Register
7 6 5 4 3 2 1 0
- - - - POVRH PADCH PCANH
Bit Number Bit Mnemonic Description
7 -
Reserved
The value read from this bit is indeterminate. Do not set this bit.
6 -
Reserved
The value read from this bit is indeterminate. Do not set this bit.
5 -
Reserved
The value read from this bit is indeterminate. Do not set this bit.
4 -
Reserved
The value read from this bit is indeterminate. Do not set this bit.
3 -
Reserved
The value read from this bit is indeterminate. Do not set this bit.
2 POVRH
Timer overrun Interrupt Priority level most significant bit
POVRH POVRLPriority level
0 0 Lowest
0 1
1 0
1 1 Highest
1 PADCH
ADC Interrupt Priority level most significant bit
PADCH PADCL Priority level
0 0 Lowest
0 1
1 0
1 1 Highest
0 PCANH
CAN Interrupt Priority level most significant bit
PCANH PCANLPriority level
0 0 Lowest
0 1
1 0
1 1 Highest