Rainbow Electronics ATmega8515L - Manual (Page 86)

86
ATmega8515(L)
2512A–AVR–04/02
OCR0 and TCNT0 when the counter decrements. The PWM frequency for the output
when using phase correct PWM can be calculated by the following equation:
The N variable represents the prescale factor (1, 8, 64, 256, or 1024).
The extreme values for the OCR0 Register represent special cases when generating a
PWM waveform output in the phase correct PWM mode. If the OCR0 is set equal to
BOTTOM, the output will be continuously low and if set equal to MAX the output will be
continuously high for non-inverted PWM mode. For inverted PWM the output will have
the opposite logic values.
Timer/Counter Timing
Diagrams The Timer/Counter is a synchronous design and the timer clock (clk
T0
) is therefore
shown as a clock enable signal in the following figures. The figures include information
on when interrupt flags are set. Figure 40 contains timing data for basic Timer/Counter
operation. The figure shows the count sequence close to the MAX value in all modes
other than phase correct PWM mode.
Figure 40. Timer/Counter Timing Diagram, no Prescaling
Figure 41 shows the same timing data, but with the prescaler enabled.
Figure 41. Timer/Counter Timing Diagram, with Prescaler (f
clk_I/O
/8)
Figure 42 shows the setting of OCF0 in all modes except CTC mode.
f
O Cn PCPW M
f
clk_I/O
N 510
⋅
------------------ =
clk
Tn
(clk
I/O
/1)
TOVn
clk
I/O
TCNTn MAX - 1 MAX BOTTOM BOTTOM + 1
TOVn
TCNTn MAX - 1 MAX BOTTOM BOTTOM + 1
clk
I/O
clk
Tn
(clk
I/O
/8)