Atmega8515(l) – Rainbow Electronics ATmega8515L User Manual
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ATmega8515(L)
2512A–AVR–04/02
• Bit 3 – USBS: Stop Bit Select
This bit selects the number of stop bits to be inserted by the Transmitter. The Receiver
ignores this setting.
• Bit 2:1 – UCSZ1:0: Character Size
The UCSZ1:0 bits combined with the UCSZ2 bit in UCSRB sets the number of data bits
(character size) in a frame the receiver and transmitter use.
• Bit 0 – UCPOL: Clock Polarity
This bit is used for Synchronous mode only. Write this bit to zero when Asynchronous
mode is used. The UCPOL bit sets the relationship between data output change and
data input sample, and the synchronous clock (XCK).
Table 64. UPM Bits Settings
UPM1
UPM0
Parity Mode
0
0
Disabled
0
1
Reserved
1
0
Enabled, Even Parity
1
1
Enabled, Odd Parity
Table 65. USBS Bit Settings
USBS
Stop Bit(s)
0
1-bit
1
2-bit
Table 66. UCSZ Bits Settings
UCSZ2
UCSZ1
UCSZ0
Character Size
0
0
0
5-bit
0
0
1
6-bit
0
1
0
7-bit
0
1
1
8-bit
1
0
0
Reserved
1
0
1
Reserved
1
1
0
Reserved
1
1
1
9-bit
Table 67. UCPOL Bit Settings
UCPOL
Transmitted Data Changed
(Output of TxD Pin)
Received Data Sampled
(Input on RxD Pin)
0
Falling XCK Edge
Rising XCK Edge
1
Rising XCK Edge
Falling XCK Edge