Bit timer/counter register description, Timer/counter1 control register a – tccr1a, Table 50 – Rainbow Electronics ATmega8515L User Manual
Page 116: Table 51, Atmega8515(l)
116
ATmega8515(L)
2512A–AVR–04/02
16-bit Timer/Counter
Register Description
Timer/Counter1 Control
Register A – TCCR1A
• Bit 7:6 – COM1A1:0: Compare Output Mode for Channel A
• Bit 5:4 – COM1B1:0: Compare Output Mode for Channel B
The COM1A1:0 and COM1B1:0 control the Output Compare pins (OC1A and OC1B
respectively) behavior. If one or both of the COM1A1:0 bits are written to one, the OC1A
output overrides the normal port functionality of the I/O pin it is connected to. If one or
both of the COM1B1:0 bit are written to one, the OC1B output overrides the normal port
functionality of the I/O pin it is connected to. However, note that the
Data Direction Reg-
ister (DDR) bit corresponding to the OC1A or OC1B pin must be set in order to enable
the output driver.
When the OC1A or OC1B is connected to the pin, the function of the COM1x1:0 bits is
dependent of the WGM13:0 bits setting. Table 50 shows the COM1x1:0 bit functionality
when the WGM13:0 bits are set to a normal or a CTC mode (non-PWM).
Table 51 shows the COM1x1:0 bit functionality when the WGM13:0 bits are set to the
fast PWM mode.
Note:
1. A special case occurs when OCR1A/OCR1B equals TOP and COM1A1/COM1B1 is
set. In this case the compare match is ignored, but the set or clear is done at TOP.
See “Fast PWM Mode” on page 108. for more details.
Table 52 shows the COM1x1:0 bit functionality when the WGM13:0 bits are set to the
phase correct or the phase and frequency correct, PWM mode.
Bit
7
6
5
4
3
2
1
0
COM1A1
COM1A0
COM1B1
COM1B0
FOC1A
FOC1B
WGM11
WGM10
TCCR1A
Read/Write
R/W
R/W
R/W
R/W
W
W
R/W
R/W
Initial Value
0
0
0
0
0
0
0
0
Table 50. Compare Output Mode, non-PWM
COM1A1/
COM1B1
COM1A0/
COM1B0
Description
0
0
Normal port operation, OC1A/OC1B disconnected.
0
1
Toggle OC1A/OC1B on compare match.
1
0
Clear OC1A/OC1B on compare match (Set output to low level).
1
1
Set OC1A/OC1B on compare match (Set output to high level).
Table 51. Compare Output Mode, Fast PWM
COM1A1/
COM1B1
COM1A0/
COM1B0
Description
0
0
Normal port operation, OC1A/OC1B disconnected.
0
1
WGM13=0: Normal port operation, OC1A/OC1B disconnected.
WGM13=1: Toggle OC1A on compare match, OC1B reserved.
1
0
Clear OC1A/OC1B on compare match, set OC1A/OC1B at TOP.
1
1
Set OC1A/OC1B on compare match, clear OC1A/OC1B at TOP.