Rainbow Electronics ATmega8515L User Manual
Features
1
Features
•
High-performance, Low-power AVR
®
8-bit Microcontroller
•
RISC Architecture
– 130 Powerful Instructions – Most Single Clock Cycle Execution
– 32 x 8 General Purpose Working Registers
– Fully Static Operation
– Up to 16 MIPS Throughput at 16 MHz
– On-chip 2-cycle Multiplier
•
Nonvolatile Program and Data Memories
– 8K Bytes of In-System Self-programmable Flash
Endurance: 1,000 Write/Erase Cycles
– Optional Boot Code Section with Independent Lock Bits
In-System Programming by On-chip Boot Program
True Read-While-Write Operation
– 512 Bytes EEPROM
Endurance: 100,000 Write/Erase Cycles
– 512 Bytes Internal SRAM
– Up to 64K Bytes Optional External Memory Space
– Programming Lock for Software Security
•
Peripheral Features
– One 8-bit Timer/Counter with Separate Prescaler and Compare Mode
– One 16-bit Timer/Counter with Separate Prescaler, Compare Mode, and Capture
Mode
– Three PWM Channels
– Programmable Serial USART
– Master/Slave SPI Serial Interface
– Programmable Watchdog Timer with Separate On-chip Oscillator
– On-chip Analog Comparator
•
Special Microcontroller Features
– Power-on Reset and Programmable Brown-out Detection
– Internal Calibrated RC Oscillator
– External and Internal Interrupt Sources
– Three Sleep Modes: Idle, Power-down and Standby
•
I/O and Packages
– 35 Programmable I/O Lines
– 40-pin PDIP, 44-lead TQFP, 44-lead PLCC, and 44-pad MLF
•
Operating Voltages
– 2.7 - 5.5V for ATmega8515L
– 4.5 - 5.5V for ATmega8515
•
Speed Grades
– 0 - 8 MHz for ATmega8515L
– 0 - 16 MHz for ATmega8515
8-bit
Microcontroller
with 8K Bytes
In-System
Programmable
Flash
ATmega8515
ATmega8515L
Preliminary
Rev. 2512A–AVR–04/02
Document Outline
- Features
- Pin Configurations
- Overview
- About Code Examples
- AVR CPU Core
- AVR ATmega8515 Memories
- System Clock and Clock Options
- Power Management and Sleep Modes
- System Control and Reset
- Interrupts
- I/O Ports
- Introduction
- Ports as General Digital I/O
- Alternate Port Functions
- Register Description for I/O Ports
- Port A Data Register – PORTA
- Port A Data Direction Register – DDRA
- Port A Input Pins Address – PINA
- Port B Data Register – PORTB
- Port B Data Direction Register – DDRB
- Port B Input Pins Address – PINB
- Port C Data Register – PORTC
- Port C Data Direction Register – DDRC
- Port C Input Pins Address – PINC
- Port D Data Register – PORTD
- Port D Data Direction Register – DDRD
- Port D Input Pins Address – PIND
- Port E Data Register – PORTE
- Port E Data Direction Register – DDRE
- Port E Input Pins Address – PINE
- External Interrupts
- 8-bit Timer/Counter0 with PWM
- Timer/Counter0 and Timer/Counter1 Prescalers
- 16-bit Timer/Counter1
- Overview
- Accessing 16-bit Registers
- Timer/Counter Clock Sources
- Counter Unit
- Input Capture Unit
- Output Compare Units
- Compare Match Output Unit
- Modes of Operation
- Timer/Counter Timing Diagrams
- 16-bit Timer/Counter Register Description
- Timer/Counter1 Control Register A – TCCR1A
- Timer/Counter1 Control Register B – TCCR1B
- Timer/Counter1 – TCNT1H and TCNT1L
- Output Compare Register 1 A – OCR1AH and OCR1AL
- Output Compare Register 1 B – OCR1BH and OCR1BL
- Input Capture Register 1 – ICR1H and ICR1L
- Timer/Counter Interrupt Mask Register – TIMSK(1)
- Timer/Counter Interrupt Flag Register – TIFR(1)
- Serial Peripheral Interface – SPI
- USART
- Analog Comparator
- Boot Loader Support – Read-While-Write Self-Programming
- Features
- Application and Boot Loader Flash Sections
- Read-While-Write and No Read-While-Write Flash Sections
- Boot Loader Lock Bits
- Entering the Boot Loader Program
- Addressing the Flash During Self- Programming
- Self-Programming the Flash
- Performing Page Erase by SPM
- Filling the Temporary Buffer (page loading)
- Performing a Page Write
- Using the SPM Interrupt
- Consideration While Updating BLS
- Prevent Reading the RWW Section During Self- Programming
- Setting the Boot Loader Lock Bits by SPM
- EEPROM Write Prevents Writing to SPMCR
- Reading the Fuse and Lock Bits from Software
- Preventing Flash Corruption
- Programming Time for Flash when using SPM
- Simple Assembly Code Example for a Boot Loader
- ATmega8515 Boot Loader Parameters
- Memory Programming
- Program and Data Memory Lock Bits
- Fuse Bits
- Signature Bytes
- Calibration Byte
- Parallel Programming Parameters, Pin Mapping, and Commands
- Parallel Programming
- Enter Programming Mode
- Considerations for Efficient Programming
- Chip Erase
- Programming the Flash
- Programming the EEPROM
- Reading the Flash
- Reading the EEPROM
- Programming the Fuse Low Bits
- Programming the Fuse High Bits
- Programming the Lock Bits
- Reading the Fuse and Lock Bits
- Reading the Signature Bytes
- Reading the Calibration Byte
- Parallel Programming Characteristics
- Serial Downloading
- Serial Programming Pin Mapping
- Electrical Characteristics
- ATmega8515 Typical Characteristics – Preliminary Data
- Register Summary
- Instruction Set Summary
- Ordering Information(1)
- Packaging Information
- Table of Contents