Rainbow Electronics ATmega8515L - Manual (Page 101)

101
ATmega8515(L)
2512A–AVR–04/02
how waveforms are generated on the Output Compare outputs OC1x. For more details
about advanced counting sequences and waveform generation, see “Modes of Opera-
tion” on page 106.
The Timer/Counter Overflow (TOV1) flag is set according to the mode of operation
selected by the WGM13:0 bits. TOV1 can be used for generating a CPU interrupt.
Input Capture Unit The Timer/Counter incorporates an input capture unit that can capture external events
and give them a time-stamp indicating time of occurrence. The external signal indicating
an event, or multiple events, can be applied via the ICP1 pin or alternatively, via the
Analog Comparator unit. The time-stamps can then be used to calculate frequency,
duty-cycle, and other features of the signal applied. Alternatively the time-stamps can be
used for creating a log of the events.
The input capture unit is illustrated by the block diagram shown in Figure 48. The ele-
ments of the block diagram that are not directly a part of the input capture unit are gray
shaded. The small “n” in register and bit names indicates the Timer/Counter number.
Figure 48. Input Capture Unit Block Diagram
When a change of the logic level (an event) occurs on the Input Capture pin (ICP1),
alternatively on the Analog Comparator output (ACO), and this change confirms to the
setting of the edge detector, a capture will be triggered. When a capture is triggered, the
16-bit value of the counter (TCNT1) is written to the
Input Capture Register (ICR1). The
Input Capture Flag (ICF1) is set at the same system clock as the TCNT1 value is copied
into ICR1 Register. If enabled (TICIE1 = 1), the Input Capture Flag generates an input
capture interrupt. The ICF1 flag is automatically cleared when the interrupt is executed.
Alternatively the ICF1 flag can be cleared by software by writing a logical one to its I/O
bit location.
Reading the 16-bit value in the Input Capture Register (ICR1) is done by first reading the
low byte (ICR1L) and then the high byte (ICR1H). When the low byte is read the high
ICFn (Int.Req.)
Analog
Comparator
WRITE ICRn (16-bit Register)
ICRnH (8-bit)
Noise
Canceler
ICPn
Edge
Detector
TEMP (8-bit)
DATA BUS
(8-bit)
ICRnL (8-bit)
TCNTn (16-bit Counter)
TCNTnH (8-bit) TCNTnL (8-bit)
ACIC* ICNC ICES ACO*