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Analog comparator, Atmega8515(l) – Rainbow Electronics ATmega8515L User Manual

Page 160

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160

ATmega8515(L)

2512A–AVR–04/02

Analog Comparator

The Analog Comparator compares the input values on the positive pin AIN0 and nega-
tive pin AIN1. When the voltage on the positive pin AIN0 is higher than the voltage on
the negative pin AIN1, the Analog Comparator Output, ACO, is set. The comparator’s
output can be set to trigger the Timer/Counter1 Input Capture function. In addition, the
comparator can trigger a separate interrupt, exclusive to the Analog Comparator. The
user can select Interrupt triggering on comparator output rise, fall or toggle. A block dia-
gram of the comparator and its surrounding logic is shown in Figure 70.

Figure 70. Analog Comparator Block Diagram

(1)

Note:

1. Refer to Figure 1 on page 2 and Table 29 on page 64 for Analog Comparator pin

placement.

Analog Comparator Control
and Status Register – ACSR

• Bit 7 – ACD: Analog Comparator Disable

When this bit is written a logic one, the power to the Analog Comparator is switched off.
This bit can be set at any time to turn off the Analog Comparator. This will reduce power
consumption in Active and Idle mode. When changing the ACD bit, the Analog Compar-
ator Interrupt must be disabled by clearing the ACIE bit in ACSR. Otherwise an interrupt
can occur when the bit is changed.

• Bit 6 – ACBG: Analog Comparator Bandgap Select

When this bit is set, a fixed bandgap reference voltage replaces the positive input to the
Analog Comparator. When this bit is cleared, AIN0 is applied to the positive input of the
Analog Comparator. See “Internal Voltage Reference” on page 47.

• Bit 5 – ACO: Analog Comparator Output

The output of the Analog Comparator is synchronized and then directly connected to
ACO. The synchronization introduces a delay of 1 - 2 clock cycles.

• Bit 4 – ACI: Analog Comparator Interrupt Flag

This bit is set by hardware when a comparator output event triggers the interrupt mode
defined by ACIS1 and ACIS0. The Analog Comparator Interrupt routine is executed if

ACBG

BANDGAP

REFERENCE

Bit

7

6

5

4

3

2

1

0

ACD

ACBG

ACO

ACI

ACIE

ACIC

ACIS1

ACIS0

ACSR

Read/Write

R/W

R/W

R

R/W

R/W

R/W

R/W

R/W

Initial Value

0

0

N/A

0

0

0

0

0