Table 6-8, Chip-select register b description -10, Csb chip-select register b 0x(ff)fff112 – Motorola MC68VZ328 User Manual
Page 98
6-10
MC68VZ328 User’s Manual
Programming Model
CSB
Chip-Select Register B
0x(FF)FFF112
BIT
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
BIT
0
RO
SOP
ROP
UPSIZ
FLASH
BSW
WS3–1
SIZ
EN
TYPE
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
w
RESET
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0x0000
Table 6-8. Chip-Select Register B Description
Name Description
Setting
RO
Bit 15
Read-Only—This bit sets the chip-select
to read-only. Otherwise, read and write
accesses are allowed. A write to a
read-only area will generate a bus error if
the BETEN bit of the SCR is set. See
Section 5.2.1, “System Control Register,”
on page 5-2 for more information.
0 = Read/write.
1 = Read-only.
SOP
Bit 14
Supervisor-Use-Only Protected Mem-
ory Block—This bit sets the protected
memory block to supervisor-only; other-
wise, both supervisor and user accesses
are allowed. Attempts to access the super-
visor-only area result in a bus error if the
BETEN bit of the SCR is set. See
Section 5.2.1, “System Control Register,”
on page 5-2 for more information.
0 = Supervisor/user.
1 = Supervisor-only.
ROP
Bit 13
Read-Only for Protected Memory
Block—This bit sets the protected mem-
ory block to read-only. Otherwise, read
and write accesses are allowed. If you
write to a read-only area, you will get a bus
error.
0 = Read/write.
1 = Read-only.
UPSIZ
Bits 12–11
Unprotected Memory Block Size—This
field determines the unprotected memory
range of the chip-select.
00 = 32K.
01 = 64K.
10 = 128K.
11 = 256K.
Reserved
Bits 10–9
Reserved
These bits are reserved and should be set to 0.
FLASH
Bit 8
Flash Memory Support—When enabled,
this bit provides support for flash memory
by forcing the LWE/UWE signal to go
active after chip-select.
Note:
This bit is used for expanded
memory size for CSD when the DRAM bit
in the CSD register is enabled.
0 = The chip-select and LWE/UWE signals go active at
the same clock edge.
1 = The chip-select signal goes low 1 clock before
LWE/UWE.
BSW
Bit 7
Data Bus Width—This bit sets the data
bus width for this chip-select area.
0 = 8 bit.
1 = 16 bit.