Motorola MC68VZ328 - Manual (Page 237)

Serial Peripheral Interface 1 and 2 13-1
Chapter 13
Serial Peripheral Interface 1 and 2
The MC68VZ328 contains two serial peripheral interface (SPI) modules, SPI 1 and SPI 2. This chapter
describes the operation and programming of both SPI modules.
While SPI 2 operates as a master-mode-only SPI module, SPI 1 represents an enhanced version of the
SPI 2 design. Equipped with a data FIFO, SPI 1 may operate as a master- or slave-configurable SPI
interface module, allowing the MC68VZ328 to interface with either an external SPI master or an SPI slave
device.
13.1 SPI 1 Overview
This section discusses how SPI 1 may be used to communicate with external devices. SPI 1 contains an
8
× 16 data-in FIFO and an 8 × 16 data-out FIFO. Incorporating the DATA_READY and SS control
signals enables faster data communication with fewer software interrupts. Figure 13-1 illustrates the
configurable serial peripheral interface block diagram.
Figure 13-1. SPI 1 Block Diagram
Clock
Generator
Clock
Control
DATA_READY
CPU Interface
Shift Register
RxFIFO TxFIFO
SS
SPICLK1
MISO
MOSI